职位诱惑
Description:
1. Participate in DFT implement, including SCAN, Boundary SCAN, and MBIST
2. Generate DFT related timing constraints and work with PD team for timing closure
3. Generate and verify DFT structural patterns and functional patterns
4. Participate in ATE bring-up and debug the DFT patterns on ATE
Requirements/Qualifications:
- Major in EE or CS preferred
- Familiar with ASIC design flow
- Familiar with Unix/Linux and script(tcl, perl etc.)
- Good English hearing, speaking, reading and writing capabilities
- Good communication skills
- Familiar with DFT is a big plus
浦东新区张东路1387号
X
投递简历 完整度0%
x举报
请写下举报的理由